Recently, semiconductor memories have been widely used for main memories of large computers, as well as personal computers, consumer electronics products, mobile phones, and the like.
Among these, a Flash-EEPROM (Electrically Erasable and Programmable Read Only Memory) nonvolatile memory represented by a NAND-Flash memory is among the fastest growing in the market, and various memory cards (SD card, MMC card, MS card, and CF card) are used as a medium for storing information of images, motion pictures, voice, and games, as a storage medium for a digital camera, a digital video, a musical instrument such as MP3, and a mobile PC (Personal Computer), and as a storage medium for a digital TV.
If the NAND-Flash memory of several tens of gigabytes can be realized, it can be used as an alternative to an HDD (Hard Disk Drive) for PC application. Further, a USB (Universal Serial Bus)-compliant card is widely used as a storage medium of the PC.
There are mainly NOR-type and NAND-type in the Flash-EEPROM nonvolatile memory. The NOR-type is characterized by high-speed read and the number of reads of about 1013, and is used as a command code storage of a portable device; however, a write-execution bandwidth is small, and therefore it is not suitable for file recording.
On the other hand, the NAND-type is capable of being highly integrated. Though an access time is as slow as 25 microseconds, it is capable of a burst read operation and has a high execution bandwidth. For the write, although a program time is 200 microseconds and an erase time is as slow as 1 millisecond, the number of bits that can be programmed or erased at a time is large. Because write data can be fetched by the burst operation and many bits can be programmed at a time, it is a memory having a high execution bandwidth.
Therefore, the NAND-type has been used in the memory cards, USB memories, and recently, in memories for mobile phones. Further, it can be expected to be used as an alternative to the HDD for the PC application.
The Flash-EEPROM nonvolatile memory is damaged at the time of performing erase/write of data with respect to a memory cell, due to application of stress to an element. Therefore, there is a problem in that the number of erase/write of data (operating life) is limited (for example, see Patent Document 1).
According to a memory management method disclosed in Patent Document 1, data divided into blocks and an inversion flag indicating whether the data bit is inverted for each block are stored, and when the inversion flag of a block to which data is to be written indicates that the bit is inverted, an inversion flag indicating that the bit is not inverted is set to write the data.
On the other hand, when the inversion flag of the block to which data is to be written indicates that the bit is not inverted, an inversion flag indicating that the bit is inverted is set to write the bit-inverted data.
In the Flash-EEPROM nonvolatile memory represented by the NAND-Flash memory, miniaturization of cells and multi-valuing for storing many pieces of information in one have been advanced to achieve large capacity.
When the is miniaturized, a tunnel oxide is thinned. Therefore, the tunnel oxide deteriorates due to repetition of program/erase, and injected electrons may leave the tunnel oxide, thereby causing generation of defective bits.
Further, due to multi-valuing of the cell, a range of a dropout amount of the injected electrons, which determines a threshold of a transistor, is narrowed, thereby causing a problem of increasing defective bits.
As a result, the number of redundant bits considerably increases to correct the defective bits, and further, there is a serious problem in that time for ECC (Error Checking and Correction), the number of logic gates, and power consumption for the correction greatly increase.
However, the memory system disclosed in Patent Document 1 is for preventing damages due to data erase/write from concentrating on a specific memory to thereby extend the operating life. Therefore, it has no effect with respect to a defective memory in which electric charge leaks during storing the data to cause garbling of data, and the defective bits cannot be relieved.
Patent Document 1: Japanese Patent Application Laid-open No. H11-25002
It is an object of the present invention to provide a memory system that can efficiently relieve a large number of defective bits with a small number of redundant bits, in a Flash-EEPROM nonvolatile memory.